Logic Gate Symbols: The Complete Chart, Truth Tables [2026]

When we define digital logic on a schematic, we use logic gate symbols to represent Boolean operations and show how signals are processed in a circuit. A single symbol can represent an entire logical function with only a few lines. However, one missed inversion bubble can change the output behavior, leading to design errors, debugging time, or costly board rework.

Logic gate symbols are the foundation of digital circuit design, appearing everywhere from basic logic ICs to complex embedded systems.

In this guide, you will learn:

• Every ANSI/IEEE and IEC symbol for all seven gates, side by side
• Truth tables and Boolean expressions for each gate
• How to read the inversion bubble on any gate
• Which 74xx and 4000-series IC implements each gate
• How a gate symbol becomes a PCB footprint

Logic Gate Symbols Chart (Quick Reference)

Figure: Logic gate symbols in ANSI/IEC form.

This chart lists every basic logic gate symbol in both drawing standards, with its Boolean expression and output rule. Use it as a lookup, then jump to any gate below for its full truth table.

Understanding Logic Gate Symbols in Circuit Schematics

A logic gate symbol is a standardized graphic representation of a logical function in an electronic schematic. In the common schematic convention, input signals enter from the left and the output leaves from the right. The symbol shape or internal identifier shows which Boolean operation the gate performs.

Every logic gate symbol carries three key pieces of information:

• The function identifier: The ANSI/IEEE outline shape, or IEC function symbols such as &, ≥1, or =1 inside a rectangular block.
• The negation indicator: A small circle (bubble) on an input or output pin indicates signal inversion or an active-low function.
• The pin arrangement: Inputs are typically shown on the left and outputs on the right, with pin numbers assigned after the symbol is linked to a physical component.

The two most common logic symbol systems are ANSI/IEEE-style symbols and IEC rectangular symbols. ANSI/IEEE symbols use distinctive gate shapes, while IEC 60617 defines rectangular blocks with standardized function identifiers for international use.

Basic Logic Gate Symbols and Truth Tables

The seven basic logic gates are AND, OR, NOT, NAND, NOR, XOR and XNOR. Each has its own symbol, truth table and Boolean expression. A buffer is added below because it shares the NOT gate outline.

#1 AND Gate Symbol

An AND gate drives its output HIGH only when every input is HIGH. Its ANSI symbol is a flat-backed D shape; the IEC form is a rectangle marked `&`.

Figure: AND gate symbol with inputs A and B

Table: AND gate truth table.

Boolean expression: Y = A · B

In practice: An AND gate gates a clock or data line, passing it only while an enable input stays HIGH.

#2 OR Gate Symbol

An OR gate drives its output HIGH when at least one input is HIGH. Its ANSI symbol has a curved back and a pointed nose; the IEC rectangle is marked `≥1`.

Figure: OR gate symbol with inputs A and B

Table: OR gate truth table.

Boolean expression: Y = A + B

In practice: An OR gate merges several fault lines into one interrupt line.

#3 NOT Gate Symbol (Inverter)

A NOT gate has one input and inverts it. Its ANSI symbol is a triangle with a bubble on the output, and the bubble, not the triangle, does the inverting.

Figure: NOT gate symbol

Table: NOT gate truth table.

Boolean expression: Y = A'

In practice: An inverter turns an active-low flag, such as `nRESET,` into an active-high signal that a GPIO can read.

#4 NAND Gate Symbol

A NAND gate drives its output LOW only when every input is HIGH. Its symbol is the AND shape with an output bubble, and it is the most widely stocked gate of all.

Figure: NAND gate symbol

Table: NAND gate truth table.

Boolean expression: Y = (A · B)'

In practice: Two cross-coupled NAND gates form an SR latch, the classic debounce for a mechanical switch.

#5 NOR Gate Symbol

A NOR gate drives its output HIGH only when every input is LOW. Its symbol is the OR shape with an output bubble, and it is the second universal gate.

Figure: NOR gate symbol

Table: NOR gate truth table.

Boolean expression: Y = (A + B)'

In practice: A NOR gate holds a reset asserted until every active-high power-good line has settled.

#6 XOR Gate Symbol

An XOR gate drives its output HIGH when its two inputs differ. Its ANSI symbol adds a second curved line across the input side of the OR shape.

Figure: XOR gate symbol

Table: XOR gate truth table.

Boolean expression: Y = A ⊕ B = A · B' + A' · B

In practice: An XOR gate produces the sum bit of a half adder. Tying one input HIGH turns it into a controlled inverter.

#7 XNOR Gate Symbol

An XNOR gate drives its output HIGH when its two inputs match. Its symbol is the XOR shape with an output bubble, so it is also called an equivalence gate.

Figure: XNOR gate symbol

Table: XNOR gate truth table.

Boolean expression: Y = (A ⊕ B)' = A · B + A' · B'

In practice: XNOR gates build the bit comparators in address decoders, where every bit must match.

#8 Buffer Gate Symbol

A buffer passes its input straight through. The symbol is a plain triangle with no bubble, and it exists to restore drive strength rather than to change the logic.

Figure: Buffer gate symbol

Table: Buffer truth table.

Boolean expression: Y = A

In practice: A buffer restores edge rate on a long trace. The CD4050B also accepts inputs above its own supply, making it a simple down-level shifter.

ANSI/IEEE vs IEC Logic Gate Symbols: Key Differences

ANSI/IEEE Std 91-1984 uses distinctive gate outlines where the shape itself identifies the basic logic function.

IEC 60617-12 represents logic functions using rectangular symbols with standardized qualifying symbols inside.

Figure: NAND gate drawn in ANSI and IEC form

How to Read the Inversion Bubble on Any Gate Symbol

The small circle on a gate symbol is a negation indicator. On an output, it inverts the result. On an input, it indicates an active-low input, meaning the gate interprets that pin using the opposite logic level.

Figure: Inversion bubble anatomy comparing a bubble on the output

• Bubble on the output: The function is complemented. AND becomes NAND, OR becomes NOR, and XOR becomes XNOR.
• Bubble on an input: That pin is active LOW. The gate sees the inverted net.
• No bubble at all: The symbol is the plain function: AND, OR, XOR or buffer.
• Wedge instead of a circle: A polarity indicator under direct-polarity notation. It marks an active-LOW pin without inverting the logic function.
• Bubble facing bubble: Two negations on one net cancel, so the pair acts as a direct connection.

Universal Gates: Building Any Function From NAND or NOR

NAND and NOR are universal gates because either one alone can build every other logic function. That property, called functional completeness, lets a board use one part number instead of four.

Figure: NAND-only construction of NOT, AND, OR and XOR

Table: Gate count for building each function from NAND only or NOR only.

Logic Gate Symbols to 74xx and 4000-Series ICs: Pinout Reference

Each gate symbol maps to a real part number. Pick the family from your rail voltage first: 74HC runs on 2 V to 6 V, while the 4000B series runs on 3 V to 18 V.

Table: Part lookup mapping each logic gate symbol to 74HC and 4000-series devices.

Figure: 74HC00 DIP-14 and SOIC-14 pinout with the four internal NAND gates

Table: 74HC00 quad 2-input NAND pinout, 14-pin package.

At the transistor level, a 2-input CMOS NAND gate uses four MOSFETs: two PMOS transistors connected in parallel as the pull-up network and two NMOS transistors connected in series as the pull-down network. For a deeper look at the devices behind CMOS logic, see our MOSFET symbol guide and transistor symbol guide.

From Logic Gates to Finished PCBs

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Conclusion

A logic gate symbol answers three questions at once. The shape names the function, the bubble names the polarity, and the pin numbers name the physical package. The third answer is the one that designers get wrong. Four gates share one package, one supply pin and one decoupling capacitor, so gate-level logic never maps one-to-one onto board-level layout.

Download the JLCPCB circuit symbols cheat sheet (PDF) for resistors, capacitors, diodes and transistors.

Keep learning:

• Diode symbol guide
• Relay symbol guide
• Circuit breaker symbols explained

FAQs about Logic Gate Symbols

Why Are There Two Sets of Logic Gate Symbols?

Two standards grew up in parallel. The distinctive shapes came from MIL-STD-806 and passed into ANSI/IEEE Std 91-1984, while IEC 60617-12 standardized the rectangle. Both are still valid, so datasheets use either.

What Are the 7 Basic Logic Gates?

The seven basic logic gates are AND, OR, NOT, NAND, NOR, XOR and XNOR. AND, OR and NOT are the primitives. NAND and NOR are universal, and XOR and XNOR compare two inputs.

What Is the Difference Between IEC and ANSI Logic Gate Symbols?

ANSI symbols name the function by outline shape, so you read them at a glance. IEC symbols use one rectangle per gate with a qualifier inside: & for AND, ≥1 for OR, and =1 for XOR.

Why Are NAND and NOR Called Universal Gates?

NAND and NOR are functionally complete, so either one alone can build every other function. Tying both inputs of a NAND together makes an inverter, and NAND networks then give AND, OR, NOR, XOR and XNOR.

Which IC Contains AND Gates?

The 74HC08 holds four two-input AND gates in a 14-pin package, and the CD4081B is its 4000-series equivalent for supplies to 18 V. The single-gate 74LVC1G08 fits a 5-pin SOT-353.