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How to Design and Assemble a Reliable ESP32 Module PCB on a 2-Layer Board

Published Jan 16, 2026, updated Jan 16, 2026

9 min


Many engineers fail when designing their first ESP32 PCB due to antenna issues, power instability, or SMT defects.


Designing a custom board with an ESP32 Module strikes the perfect balance between customizability and ease of manufacturing. Unlike a chip-down design, the module integrates the crystal oscillator, flash memory, and RF matching network, reducing the PCBA risk significantly.


Nonetheless, the SMD package (for example, the ESP32-S2-WROOM modules) comes with its own challenges at JLCPCB SMT. The main concerns are the gold pad wicking, large RF shield thermal management, and the possibility of the on-board PCB antenna performance deterioration due to the assembly process.


This guide shows how to design a reliable ESP32-S2 module PCB on a 2-layer board.



Step 1 – Designing the ESP32 Module Schematic


Using an ESP32 SMD module simplifies the BOM by eliminating external clocks and RF passives. From a PCBA standpoint, the schematic stage is where cost, sourcing stability, and assembly yield are determined.


1.1 Selecting Components for ESP32 Module Designs


Your schematic components must map to real inventory.


Basic vs. Extended Parts: JLCPCB distinguishes between "Basic" parts (pre-loaded on feeders, no setup fee) and "Extended" parts (require manual loading, fee applies). To reduce the costs of PCBA, prioritize "Basic" resistors and capacitors of sizes 0603/0402.


Availability Check: Before concluding with the schematic, check the availability of the ESP32-S2 module and important ICs (LDOs) in the JLCPCB parts library.


Searching in JLCPCB Parts Library

Searching in JLCPCB Parts Library


1.2 Understanding the ESP32-S2-Wroom Microcontroller Module


The module features 41 pins (castellated edges) and an integrated PCB antenna.


Electrical Specs: A strong 3.3V rail that can handle 320mA (TX peaks) is required.


PCBA Advantage: The internal 40MHz crystal is already shielded and matched, removing the most common cause of boot failures in custom boards.


1.3 Designing the UART Programming Interface (FTDI) for the Microcontroller


Bypassing the USB connector and bridge chip, an external FTDI adapter will be connected via a 2.54mm Pin Header.


Connections: Route U0TXD (GPIO 43) and U0RXD (GPIO 44) to the connector header.


Boot Strap Pins: Make the EN (Reset) pin available through tactile switches or the header so that manual entry into bootloader mode is possible.


Note:  Please verify GPIO mapping against your specific ESP32-S2-WROOM datasheet.


1.4 Validating the Schematic for ESP32 Module PCBA


Before converting to PCB layout, perform these assembly-focused checks:


1. Pin Numbering: Does the schematic symbol pinout match the specific SMD-41P datasheet variant?


2. Net Connectivity: Are the strapping pins (GPIO 0, GPIO 46) pulled to the correct levels (Pull-up/Pull-down) to ensure the chip boots from flash?


3. Power Nets: Are the 3.3V and GND nets clearly defined and connected to all power pins (VDD3P3_RTC, VDD3P3_CPU)?

Schematic diagram of ESP32-S2 module

Schematic diagram of ESP32-S2 module with FTDI header and power circuit.



Step 2 – Laying Out a 2-Layer PCB for ESP32 Modules


It is necessary to follow the mechanical and thermal rules very carefully when designing a two-layer board for the ESP32 SMD module.



2.1 Designing Castellated Pads and the Thermal Pad


The module has a large central Ground pad (EPAD) under the metal shield (check your specific datasheet, as some SMD-41P variants have a full EPAD while others just use the pins).


Via Layout: If your module has a central EPAD, place a 3x3 grid of 0.3mm vias connecting to the bottom Ground plane for heat dissipation.


Castellated Pads: The pad on the PCB should be a bit longer than the pad of the module (extend it 0.5mm outwards) so that the solder fillet can form a visible "heel" for inspection.


PCB footprint layout for ESP32-S2

PCB footprint layout for ESP32-S2 showing castellated pad extension and antenna keep-out.


2.2 Implementing Proper Antenna Keep-Out for ESP32 PCB Antennas


The "On-board PCB Antenna" (the squiggly trace at the end of the module) is extremely sensitive.


Placement: The best location is hanging off the edge of the board.


Keep-Out: If the module is fully on the board, you must remove all copper (GND, Power, Signals) on all layers directly underneath the antenna area for at least 15mm. Copper underneath will detune the antenna and block the signal.


correct antenna keep-out zone vs incorrect ground plane placement for ESP32 modules

PCB layout comparison showing correct antenna keep-out zone vs incorrect ground plane placement for ESP32 modules.


2.3 Ensuring Power Integrity for ESP32 TX Current Peaks (320mA)


Capacitor Layout: Place a 10uF (0603) and a 0.1uF (0402) capacitor close to the 3V3 input pin (Pin 2 on many SMD-41P pinouts).

Trace Width: To reduce the voltage drop caused by the 320mA transmission spikes, the primary 3.3V trace should have a width of at least 20-30 mils.



Step 3 – Designing the ESP32 Module PCB for SMT Assembly


3.1 Designing the FTDI Header for SMT Assembly and Mechanical Reliability


Using a simple header simplifies the BOM but requires mechanical consideration.


Header DFM

SMD Headers: The copper area of the pads must be large enough to accommodate the insertion force of the FTDI cable when using SMT headers.

Pin Definition: Standardize your pinout (e.g., GND, CTS, VCC, TX, RX, DTR) to match common FTDI cables.


DefectRoot CausePrevention
Insufficient WickingPad too shortExtend PCB pad 0.5mm outside
ShadowingModule blocks heatAdjust Reflow Profile
Antenna DetuningCopper under antennaStrict Keep-Out Zone


3.2 Optimizing Solder Paste and Stencil Apertures for ESP32 Modules


The large metal shield of the SMD-41P module acts as a heat sink, which affects how solder paste melts.


Castellated Pins: The stencil aperture for the side pins should be 1:1 or slightly enlarged to ensure enough paste volume. The goal is to have the solder wick up the vertical side of the module.


Thermal Pad (If present): Use a "Window Pane" design (50-60% coverage) to prevent the module from floating on a pool of solder, which would disconnect the outer pins.


3.3 Applying Design for Manufacturing (DFM) Rules for ESP32 Modules at JLCPCB


Component Spacing

Maintain at least 1.0mm clearance around the module. This allows the Pick-and-Place machine nozzle to place the module without hitting adjacent resistors or capacitors.

Check JLCPCB Capabilies for more details.


Panelization

For small boards, use the "Panel by JLCPCB" option.

Orientation: Ensure the USB/FTDI connector (if overhanging) or the antenna overhang does not interfere with the V-cut rails.


Panel by JLCPCB

Panel by JLCPCB



Step 4 – Preparing Gerber, BOM, and CPL Files for ESP32 Module SMT Assembly


1. Gerber Files: Standard Gerber export in any eda software.


2. CPL Rotation: Verify the rotation of the large module in the JLCPCB 3D viewer. It is common for modules to be rotated 90 or 180 degrees incorrectly in the default export.



Component Placement 3d view

Component Placement 3d view showing an unaligned rotated component



Step 5 – Ordering ESP32 Module PCBA at JLCPCB


1. Uploading Gerber files and selecting SMT assembly services on the JLCPCB instant quote page.

Ordering PCBA Service at JLCPCB


2. Select PCB Assembly and standard type for both sides


JLCPCB PCB Assembly Service


3. Sourcing: Check if the specific "ESP32-S2 SMD-41P" module is in the JLCPCB Parts Library. If it is an "Extended Part," you will pay a small loading fee (approx $3).


4. Global Source: If the part is not in the JLCPCB library, you can often source it via Global Sourcing during the order process.


Component assembled view

Component assembled view



Managing Assembly Yield and Inspection Risks


Inspecting Castellated ESP32 Modules with AOI


Visible Fillets: The primary advantage of the castellated module is that AOI (and human inspection) can easily verify the solder joints on the side. You want to see a shiny concave fillet rising up the side of the half-hole.


Understanding First-Pass Yield (FPY) Risks in Module Assembly


Yield is generally very high for modules. The main risk is "Head-in-Pillow", where the paste melts but doesn't wet to the module pin because the board warped or the pin was slightly oxidized.


Risk FactorImpact
Head-in-PillowOpen circuit
Solder BallsShorts under shield
Antenna ShieldingPoor Range

Microcontroller Module PCBA Yield Risk Factors



Bring-Up and Validation of the ESP32 Module PCBA


1. Impedance Check: Measure resistance between VCC and GND. Expect >1kΩ.


2. UART via FTDI: Connect your FTDI adapter. Hold BOOT, press EN.

Success: The Serial Terminal (115200 baud) shows waiting for download. This confirms the module is soldered correctly, powered, and the UART0 pins are connected.


3. RF Performance: Run a Wi-Fi scan sketch. If RSSI is weak, check if you accidentally placed a ground plane under the antenna area.



Conclusion


Utilizing the ESP32-S2 SMD-41P Module to custom PCB design brings a considerable reduction of the barrier of entry over a bare chip. Manufacturing of professional-quality IoT hardware with high reliability can be achieved by using JLCPCB's automated assembly through focusing on the mechanical integration - particularly antenna keep-outs and castellated pad soldering.


Produce your Microcontroller development board with JLCPCB


Looking to scale your microcontroller project? JLCPCB offers automated SMT assembly, module sourcing, and fast delivery for 2-layer PCB and PCBA.


FAQ


Q1. Why are microcontroller boards more sensitive to PCBA quality than analog boards?

Microcontrollers are sensitive to power integrity, solder joint reliability, and transient current behavior. Assembly defects such as insufficient decoupling, cold joints, or misaligned packages can prevent boot or cause intermittent failures.


Q2. Can microcontroller modules be reliably assembled using SMT?

Certainly! There are joint features on the castellated pads if the stencil design (aperture size) and pick-and-place alignment rules are adequately followed.


Q3. What is the reason for the failure of microcontroller boards after assembly despite correct schematics?

Most of the time, the failures are caused by power integrity problems (wrong capacitor placement) or solder joint defects (tombstoning, cold joints) rather than by logic errors.


Q4. Does JLCPCB support ESP32 and other microcontroller chip module sourcing and assembly?

Yes, JLCPCB PCBA will use their affiliation with global partner to source different microcontroller chip modules as well as to simplify the supply chain for custom boards, thus, making the whole process of obtaining custom boards less complicated.


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