KiCad MCP: How to Design a PCB with Claude Code [Step-by-Step]

Introduction

What if you could ask Claude AI to design a PCB in KiCad and watch it create the schematic, place components, and route the board? With a KiCad MCP server, Claude can interact directly with KiCad 10, turning design instructions into an actual PCB layout.

But how well does it work on a real circuit? To find out, we used Claude to design a 5A XL4015 buck converter PCB, from schematic creation to a two-layer board layout. Along the way, we explored what Claude can handle on its own, where it makes mistakes, and why human verification is still important.

In this article, we'll walk through how Claude connects to KiCad, how to set up the MCP server safely, and what happened when we put AI-assisted PCB design to the test.

In this guide, you will learn:

• How Claude AI connects to KiCad to design and edit PCBs
• How to safely set up a KiCad MCP server
• Step-by-step design: from schematic generation to finished board layout.
• Which errors passed ERC, and how to verify the board

Figure: 3D view of the XL4015 buck converter PCB designed with Claude in KiCad 10

How Does Claude Code Design a PCB in KiCad Using MCP?

Claude Code can design a PCB in KiCad by using the Model Context Protocol (MCP) to communicate with KiCad's design tools.

The MCP server acts as a bridge, allowing Claude Code to read project files, create schematics, place components, route traces, and perform design checks. Instead of simply generating PCB design suggestions, Claude Code can make actual changes to the KiCad project.

However, the operations it can perform depend on the MCP server, and the resulting design still requires engineering verification.

A KiCad MCP setup has three parts:

• AI client: Claude Code or the Claude desktop app, which decides which tool to call and with what values.
• MCP server: A local program that exposes KiCad actions as tools, such as building a schematic, moving a footprint, or running DRC.
• KiCad: The KiCad editor is accessed via the KiCad API while the project is open, and via kicad-cli for exports and design checks.

Figure: How KiCad MCP works

KiCad MCP is not a single product. Several open-source servers exist, and they differ in how much of your project they can change. It belongs to the broader group of AI tools for PCB design and works directly with your KiCad project.

Claude KiCad MCP Example: An XL4015 5 A Buck Converter PCB

In one working session, Claude and a KiCad MCP server produced a two-layer, 63 × 33 mm XL4015 buck converter board with 0 ERC violations and 0 DRC errors. It redesigns a common 5 A CC/CV module and has not yet been fabricated or bench-tested.

Design Fixes Over the Reference XL4015 Module

Before any schematic existed, a datasheet review of the reference module found four problems. The fix sizes the input side to the XL4015's maximum operating input of 36 V, rather than the narrower range listed on the seller's page.

The review came first because KiCad MCP builds the schematic from the given netlist.

How to Set Up a KiCad MCP Server Safely

Choose a server that is read-only by default, install it from a copy you have reviewed, connect it over stdio, and confine it to one project folder under git. Then enable the KiCad API so the server can reach the open editor.

Choosing a KiCad MCP Server: Access Comparison

Which KiCad MCP Server should you use?

The main difference between servers is what they can change by default:

This build used kicad-mcp-pro, because its read-only default limits what an AI error can change.

Installing KiCad MCP and Connecting It to Claude

The installation followed five steps (copy and paste this step directly into Claude, and it will manage the installation for you):

Figure: KiCad project tree of the sandbox folder used by the KiCad MCP server

1. Review the code first: The targeted review checked for network calls and telemetry, the subprocesses it starts (kicad-cli, git, and ngspice only), and whether file paths remain within the workspace root.
2. Install a pinned copy: The reviewed release was copied into a private repository and installed from there, using the hash-locked dependency file.
3. Register it with Claude Code over stdio: stdio does not open a network port, so only the local client can reach the server.
4. Confine it to one sandbox folder under git: Turn on the server's build (write) profile only for this folder. Each change the AI makes can then be inspected with git and reverted if needed.
5. Enable the KiCad API: In KiCad, open Preferences > Plugins and select Enable KiCad API.

Figure: KiCad 10 preferences with the Enable KiCad API option selected

KiCad MCP Connection Problems and Fixes

These four problems blocked the connection during the build:

KiCad MCP Workflow: From Schematic to Finished Board

The design went from netlist to finished board in four steps. In each step, the AI did the editing, and a check confirmed the result before the next step began.

Step 1: Generating the KiCad Schematic from a Netlist

Claude built the schematic with one MCP call, sch_build_circuit, from a 16-net netlist. Each pin received a short wire stub and a named net label, so the nets connect by name.

Figure: Schematic generated with KiCad MCP for the XL4015 5 A CC/CV buck converter

Two problems appeared during this step:

• Overlapping LM358 units: During automatic schematic layout, Claude Code placed the LM358 schematic units on top of each other. The MCP server also struggled to identify the pins belonging to each unit.
• Overlapping net labels: Two overlapping labels accidentally connected the current-sense (ISENSE) and current-limit set-point (ISET) nets. KiCad's Electrical Rules Checker (ERC) only raised a warning, not flagging the connection as an error. A pin-by-pin comparison of the exported netlist revealed the mistake, allowing it to be corrected.

The final schematic passed ERC with 0 violations, and the exported netlist matched the intended one on all 16 nets.

Step 2: Sizing the Board and Placing Components

The component courtyards required about 1,500 mm², exceeding the 1,272 mm² of the reference module's 50.5 × 25.2 mm outline. The board grew to 63 × 33 mm with four M3 holes.

Placement was planned offline using a script that checked for overlaps and generated a preview using the ratsnest. The positions were then applied live in KiCad with the pcb_move_footprint tool.

Figure: Placement plan for the XL4015 buck converter PCB, with courtyards and ratlines

The layout follows the PCB layout principle of a short, direct power path:

• Power flow, left to right: J1 > C1 > XL4015 > switching node > L1 and D1 > output capacitors C4 and C5 > J2.
• Switching loop: The input ceramic capacitor C2 sits between the XL4015 VIN pin and the anode of catch diode D1, which keeps the high-current switching loop small.
• Current sense: The shunt resistors sit on the return path, and the trimmers sit on the bottom edge for access.

Step 3: Routing the Power and Feedback Nets

The KiCad MCP server did not include an autorouter, so Claude Code created its own basic routing tool in Python. It used the A* pathfinding algorithm to find routes on a 0.1 mm grid across both PCB layers. For high-current connections, Claude used copper pours instead of narrow traces to provide wider paths for current flow:\

Figure: FB trace beside the SW node in pass 1

• Copper pours: VIN, SW, VOUT, and the current-sense path.
• Ground: A GND plane on the bottom layer and a GND fill on the top layer.

The first pass routed the feedback (FB) trace right beside the switching node, where switching noise can couple into the regulation loop. A 1.2 mm keepout around SW for analog nets fixed it, in line with standard PCB routing rules. FB now leaves to the left and passes under VIN on the bottom layer.

Step 4: Running KiCad DRC and Cleaning Up the Silkscreen

The first design rule check reported 7 copper-to-edge errors. The router had used a 0.35 mm edge clearance, while the board rule was 0.5 mm. After the router was corrected and the board rerouted, the final DRC showed 0 errors, 0 unconnected items, and 0 schematic-parity issues.

Figure: Bottom side of the KiCad MCP board with the silkscreen legend for ratings

A label-placement script then moved each reference designator clear of pads and other silkscreen. Silkscreen warnings fell from 47 to 2, both from terminal-block bodies at the board edge. The bottom legend lists the ratings, the trimmer roles, and the LED meanings.

KiCad MCP Problems: What Went Wrong and How It Was Fixed

The AI or the server caused seven distinct issues during the build. A check caught each one: the netlist comparison, DRC, a layout review, or a direct parts query.

Why ERC Is Not Enough for AI-Generated PCB Designs: Verify the KiCad Netlist

ERC checks electrical rules such as unconnected pins and conflicting outputs. It does not know which pins you intended to connect, so a short between two valid nets can pass. Add these checks after ERC:

1. Write down the intended netlist: List every net and every pin on it before the AI builds anything.
2. Export the netlist with kicad-cli: Use the schematic the AI generated, not the one you planned.
3. Compare every net, pin-for-pin: In this build, 16 of 16 nets matched after the ISENSE short was fixed.

From KiCad MCP Design to JLCPCB Order: Gerbers, BOM, and Parts

The design is not ready to order yet: the Gerber, BOM, and CPL files have not been generated because the server's manufacturing profile is still off. The parts are already chosen with LCSC numbers, using JLCPCB Basic parts where possible.

The key parts, checked in the JLCPCB Parts Library:

• XL4015E1 (C51661): buck converter IC
• LM358DR2G (C7950): current-loop op-amp, a Basic part
• BL8078CC3TR50 (C692269): 5 V LDO, rated for 40 V input
• TL431 (C181103): 2.5 V reference
• CYA1265-33UH (C19268671): 33 µH, 6 A inductor
• SS54 (C5204950): catch diode
• 0.1 Ω, 2 W, 2512 (C160587): current-sense shunt, two in parallel

The remaining steps are the standard KiCad export flow.

Generate the Gerber and drill files with the KiCad Gerber export guide, then export the BOM and CPL files with the KiCad BOM and CPL guide for SMT assembly.

Conclusion

Claude Code can turn a netlist into a complete, DRC-clean PCB layout in KiCad using MCP, but human verification is still essential. In this project, Claude Code handled the PCB design, while manual netlist and datasheet checks helped identify and correct errors the AI missed.

Use KiCad MCP for schematic entry, placement, and rule fixes, and keep the engineer on netlist comparison, pinout checks, and layout review. This split keeps the speed of AI-driven editing while still checking every connection against the design intent.

Once your design is verified, upload your files to JLCPCB to get an instant quote.

FAQs About KiCad MCP