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Turn Your Raspberry Pi Pico into a Professional JTAG Programmer with DirtyJTAG & OpenFPGALoader

Published Mar 13, 2026, updated Mar 13, 2026

5 min

Table of Contents
  • Project Overview
  • Why OpenFPGALoader + DirtyJTAG Wins
  • How It Works: Pico as DirtyJTAG Adapter
  • Step-by-Step Setup on Windows (Exact Commands from the Project)
  • Custom FPGA Board + JLCPCB PCBA
  • Real-World Testing: Two Lattice ECP5 Demos
  • Real-World Testing: Two Lattice ECP5 Demos
  • How to Build Your Own Pico JTAG Programmer + Custom FPGA Board
  • Final Thoughts
  • FAQs

In the world of FPGA development, having a reliable, low-cost JTAG programmer used to mean either buying expensive vendor cables or adding high-cost FTDI chips to every board. Maker Khaled Magdy changed that by turning a $4 Raspberry Pi Pico into a fully functional JTAG adapter using DirtyJTAG firmware and OpenFPGALoader — then had his custom FPGA boards professionally assembled by JLCPCB.


The entire solution is 100% open-source. You can download the firmware, follow the Windows installation steps, and order your own custom FPGA PCBs with JLCPCB PCBA in minutes.


Project Overview


This setup lets you program almost any FPGA (Lattice ECP5, iCE40, Artix-7, Gowin, Efinix, and more) using a single $4 Pi Pico as your JTAG cable. No more carrying multiple vendor programmers. The same USB port even provides UART debugging.


Author Khaled Magdy explains: “I’ve been using FTDI solutions for years. Recently I decided to give open-source a try — and the cost savings plus universal support made it an easy choice for all my future custom FPGA designs.”


Why OpenFPGALoader + DirtyJTAG Wins


· Cost Optimization: Replace a $9 FTDI chip with a $1 MCU. Same USB-JTAG + USB-UART functionality.

· Universal Support: Works with Xilinx, Altera, Lattice, Gowin, Efinix and more.

· Open-Source Toolchain Friendly: Perfect with Yosys/nextpnr — no vendor tools required.


How It Works: Pico as DirtyJTAG Adapter


The Pico-DirtyJTAG firmware uses the RP2040’s PIO to emulate a full JTAG interface. Default pinout is simple:

SignalGPIOPico Pin
TDI1621
TDO1722
TCK1824
TMS1925
RST2026
TRST2127

Flash the UF2 file once, install the WinUSB driver with Zadig, and you’re ready.



Step-by-Step Setup on Windows (Exact Commands from the Project)


1. Download & build Pico-DirtyJTAG in VS Code → flash UF2 to Pico.

2. Install MSYS2.

3. Run: pacman -S mingw-w64-ucrt-x86_64-openFPGALoader

4. Open MSYS2 UCRT64 terminal and verify: openFPGALoader -V

5. Use Zadig to switch Pico to WinUSB driver.

6. Connect JTAG pins to your FPGA.

7. Detect: openFPGALoader -c dirtyJtag --detect


Load bitstream to SRAM:
openFPGALoader -c dirtyjtag --bitstream MyDesign.bitFlash to external SPI FLASH:
openFPGALoader -c dirtyjtag -f MyDesign.bit --write-flash


Custom FPGA Board + JLCPCB PCBA


Khaled designed a full custom Lattice ECP5 board and used JLCPCB for fabrication and assembly. The process was exactly the same as any JLCPCB project:


1. Upload Gerber files and choose 2-layer options.

2. Upload BOM + CPL files — JLCPCB auto-matches components from its library.

3. Review 3D preview and place the order (use coupon for extra savings).

4. Boards arrived in days, fully assembled and ready for testing.


“JLCPCB made professional-grade FPGA hardware accessible and affordable,” Khaled noted. “The quality exceeded expectations — perfect for integrating my new DirtyJTAG solution.”


Real-World Testing: Two Lattice ECP5 Demos


GPIO Demo: Button controls one LED, others stay OFF after power cycle — bitstream loaded permanently to SPI FLASH via OpenFPGALoader.
UART Demo: Loopback test between FPGA and Pico (USB CDC) — proves both JTAG programming and serial debugging work on the same USB port.Both demos ran flawlessly after JLCPCB assembly.


“JLCPCB made professional-grade FPGA hardware accessible and affordable,” Khaled noted. “The quality exceeded expectations — perfect for integrating my new DirtyJTAG solution.”


Real-World Testing: Two Lattice ECP5 Demos


GPIO Demo: Button controls one LED, others stay OFF after power cycle — bitstream loaded permanently to SPI FLASH via OpenFPGALoader.


UART Demo: Loopback test between FPGA and Pico (USB CDC) — proves both JTAG programming and serial debugging work on the same USB port.Both demos ran flawlessly after JLCPCB assembly.



How to Build Your Own Pico JTAG Programmer + Custom FPGA Board


Download Pico-DirtyJTAG and OpenFPGALoader from GitHub.  

Flash firmware to any Pi Pico.  

Follow the Windows steps above (5 minutes).  

Design your FPGA PCB in KiCad or Lattice Diamond.  

Upload Gerber/BOM/CPL to jlcpcb.com → enable PCBA.  

Receive factory-assembled boards and start programming instantly!


Project Specifications


·  Programmer: Raspberry Pi Pico (RP2040) + DirtyJTAG firmware

·  Tool: OpenFPGALoader (supports 20+ FPGA families)

·  Cost: ~$4 total for JTAG cable

·  Features: SRAM + SPI FLASH programming, USB-UART bridge

·  Compatible FPGAs: Lattice ECP5, iCE40, Artix-7, Gowin, etc.

·  License: Fully open-source


Final Thoughts


This project proves that professional FPGA development no longer needs expensive tools. With a $4 Pico, open-source software, and JLCPCB’s reliable PCBA service, anyone can build and program custom FPGA hardware at hobbyist prices.


Whether you’re creating your first FPGA board or scaling to production, this combination is the perfect starting point.


Ready to build your next FPGA project?
Get an instant quote for PCB + PCBA at
JLCPCB today!


All files are free to download and use. Go create something amazing — you can do it


FAQs


Q1: Why use DirtyJTAG instead of FTDI?


Saves ~$8 per board while providing the same JTAG + UART functionality on one USB port.


Q2: Which FPGAs are supported?


Lattice ECP5, iCE40, Xilinx Artix-7/Spartan, Gowin, Efinix and many more — full list in OpenFPGALoader wiki.


Q3: Can I flash bitstream to external SPI FLASH?


Yes! Use openFPGALoader -c dirtyjtag -f file.bit --write-flash.


Q4: Is the firmware open-source and free?


100% — both Pico-DirtyJTAG and OpenFPGALoader are open-source with complete GitHub repos.


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