Castellated PCBs: Introduction and Design Requirements
11 min
- Explanation of Castellated Holes
- Challenges with Castellated Holes
- Design Requirements
- FAQ: Castellated PCBs Design & Manufacturing
- Conclusion
With the rapid development of electronic technology, electronic products are moving towards miniaturization, portability, multi-functionality, high integration, and high reliability.Consequently, printed circuit boards (PCBs) are frequently designed to integrate pre-existing, off-the-shelf modules. For example, IoT Bluetooth modules or NB-IoT modules, which are indispensable communication modules, can be soldered onto PCBs just like chips. These carrier boards are characterized by their small size and a row of metalized castellated holes along some edges, allowing them to be soldered to a main PCB. This PCB assembly process is referred to as the castellated hole process in the industry.
Explanation of Castellated Holes
The following is a close-up photo of a castellated edge on a PCB:
This type of PCB has a row of metalized half-holes along its edge. These holes are relatively small and are mainly used on carrier boards. They serve as a daughter board to a main PCB and are soldered to the main PCB and component pins through these metalized half-holes.
Challenges with Castellated Holes
How to control the product quality effectively after forming the half-metalized holes along the edge of the board, such as preventing copper burrs, peeling, and residues, has always been a challenge in the manufacturing process. If there are copper burrs left inside these half-metalized holes, it can lead to weak solder joints and poor connections during component assembly, and potentially causing short circuits between pins.
In conventional production, castellated holes are first drilled as round holes, and then copper is plated into them. The challenge is to remove the other half of the hole while ensuring that the remaining half's copper wall remains intact and doesn't peel or lift.
Whether it's drilling or milling, the spindle's rotation direction is clockwise. When the tool reaches point A, the copper plating on the hole wall is pushed against the substrate by the tool bit, ensuring that there won't be any copper burrs, peeling, or residues at this point. On the other hand, when the tool reaches point B, there is no support for the copper from the hole wall. As the tool rotates forward, its forces cause the copper to curl in the direction of tool rotation, leading to copper burrs and residues. These factors directly affect the customer's installation and use.
To achieve the above goals, JLCPCB has conducted numerous exploratory experiments and have become proficient in the castellated hole process. After drilling and copper plating, we use a two-step drilling/milling process to ensure that half of the metalized hole (slot) is retained. In simple terms, the castellated hole is cut in half along the board's edge while ensuring the integrity of its plating, allowing customers to solder and use it. At present, the castellated hole process is well-established at JLCPCB.
Reasons for Increased Costs for Castellated Boards: The castellated hole is a special process. To guarantee that the copper barrel inside the half-hole remains flawlessly intact, the factory executes a specialized two-step mechanical drilling and synchronized CNC profile milling sequence during the final routing phase. This highly controlled path prevents copper from lifting, thereby incurring extra manufacturing and optimization costs.
Design Requirements
Basic Dimensions
| Dimension | Minimum |
|---|---|
| Board size | 10 mm × 10 mm |
| Board edge to castellated pad (A) | 1.0 mm |
| Castellated pad drill diameter (B) | 0.6 mm |
| Hole-to-hole clearance (C) | 0.6 mm |
| Annular ring (D) | 0.25 mm (absolute minimum 0.18 mm) |
A. Castellated pad edge to board edge distance ≥ 1 mm.
B. Castellated hole diameter size ≥ 0.6 mm.
C. Castellated hole edge to hole edge ≥ 0.6 mm.
D. Castellated hole annular ring 0.25 mm (absolute limit 0.18 mm). Engineering will change any values below this. If there are special requirements for pad-to-pad distance, please specify when ordering and confirm the production files.
Table 2: Expanded JLCPCB Castellated Hole Manufacturing Capabilities (Rigid PCB)
| Feature / Parameter | Minimum Specification | Recommended Value | Engineering Remarks |
|---|---|---|---|
| Castellated Hole Diameter | 0.6 mm | 0.8 mm - 1.0 mm | Standard rigid mechanical drill constraints. |
| Hole-to-Hole Edge Clearance | 0.6 mm | ≥ 0.8 mm | Prevents web cracking and solder bridging. |
| Distance from Hole to Board Corner | ≥ 3.0 mm | ≥ 5.0 mm | Critical to prevent stress fractures during V-cut/milling. |
| Pad Inward Extension Length | ≥ 0.5 mm | 0.8 mm | Ensures robust mechanical anchoring to the substrate. |
| Preferred Surface Finish | ENIG (Gold) | ENIG | Highly recommended; mandatory if castellated slot length ≥ 5mm. |
| Minimum Single Board Dimensions | 10 mm × 10 mm | Panelization required if < 20 mm | Ensures safe handling and clamping during profile routing. |
Note: If widths smaller than 0.25 mm are required, please leave a note with your order, and select “confirm production files” to later confirm any adjustments made.
Pad Shape and Placement
Castellated holes can be designed as round or oval (with round or square solder pads), but attention should be paid to positioning the solder pads in the internal area of the board outline. For designs with only one-third of the holes inside the board, as shown in the corresponding design diagrams, this layout cannot meet manufacturing constraints, this design cannot meet the production process; at least the holes must be positioned on the centerline of the board outline. In addition, as shown in the diagrams below, oval castellated holes, oval castellated holes parallel to the board edge can only proceed if the hole extends 1/2 into the board. When the length is greater than or equal to 5mm, ENIG surface finish process is required.
EDA Design & Gerber Generation Guidelines for Castellated Holes
To ensure JLCPCB’s CAM system recognizes your castellated holes correctly and automatically, please strictly follow these EDA layout configurations:
- Layer Overlap: The board outline (typically on the Mechanical 1 or Keep-Out layer in Altium; Edge.Cuts in KiCad) must precisely bisect (cut through the centerline of) the plated-through holes (PTH).
- Hole Attribute: The holes must be set as PTH (Plated Through Hole). If they are accidentally set as NPTH (Non-Plated Through Hole), the factory will mill away the copper, leaving no plating inside.
- Copper Pad Requirement: Top and Bottom copper pads associated with the castellated hole must extend inward by at least 0.5 mm from the board edge to ensure adequate mechanical adhesion and prevent delamination during routing.
Panelising Castellated Boards
For castellated boards, single-board dimensions must be ≥ 10 mm with panel format, the panel dimension should be ≥ 10 mm, and castellated boards can also use the V-cut and mouse bite panelization methods.
One point to emphasize is that V-cut shaping should not be used on castellated edges (because the V-cut tool will pull on the copper, causing it to detach from the hole). Instead, CNC milling should be used for shaping.
V-Cut Panels (Non-Castellated Edges Only)
Mouse Bite Panels
Technical Specifications for Mouse Bite (Stamp Hole) Panelization
When opting for Mouse Bite panelization on edges with castellated holes, you must comply with JLCPCB’s structural density standards to avoid panel breakage during transport or routing:
- Stamp Hole Diameter: Use a drill size between 0.5 mm and 0.8 mm (0.6 mm is highly recommended).
- Pitch/Spacing: The center-to-center spacing between neighboring stamp holes must be maintained at 1.0 mm to 1.2 mm.
- Array Quantity: Each structural breakout tab should ideally consist of 4 to 6 holes depending on the sub-board weight.
- Clearance to Castellated Pads: The distance between the edge of the nearest stamp hole and the edge of any castellated pad must be ≥ 1.0 mm to prevent stress-induced cracks on the plated barrel during manual board separation.
Four-sided castellated hole panel
Ensuring high-quality PCBs is essential to bring your PCB designs to life. At JLCPCB, we are committed to maintaining top-notch production standards by investing in cutting-edge equipment and collaborating with leading raw material suppliers worldwide. With five intelligent self-owned production bases, we are able to lower production costs resulting from large-scale effects on manufacturing so that to provide affordable hardware innovation opportunities to our customers.
FAQ: Castellated PCBs Design & Manufacturing
Q: What is a castellated PCB, and what are its primary applications?
A castellated PCB features a row of metalized half-holes (or slots) along its outer edges, allowing it to act as a daughter board or carrier module that can be directly soldered flat onto a main system PCB just like a surface-mount chip. This design is highly favored for compact, multi-functional, and highly integrated devices, making it the industry standard for production-ready wireless communication modules such as IoT Bluetooth, Wi-Fi, and NB-IoT sub-boards.
Q: What is the minimum drill diameter and hole-to-hole clearance required by JLCPCB for rigid castellated boards?
For standard rigid PCBs, JLCPCB requires both the minimum castellated hole drill diameter and the minimum hole-to-hole edge clearance to be at least 0.6 mm. Designing these parameters below the 0.6 mm threshold can compromise the structural integrity of the copper plating inside the half-hole during fabrication or trigger an engineering query (EQ) before production begins.
Q: Why does ordering a castellated PCB incur extra manufacturing costs compared to standard boards?
Castellated holes demand a specialized, multi-step production routine where standard plated-through holes must be drilled and electroplated first, followed by a precise, highly controlled CNC profile milling path during the final shaping stage to cleanly cut the holes in half without peeling or lifting the delicate inner copper walls. Additionally, castellated modules are generally very small in size, which requires complex panelization layouts and extra tool path optimizations, resulting in non-standard pricing.
Q: Can I use V-cut scoring on the panel edges that contain castellated holes?
No, V-cut scoring must never be applied to any board edge featuring castellated holes because the physical pulling and tearing forces exerted by the V-grooving blade will rip the thin copper plating away from the hole wall. Instead, CNC mechanical milling must be utilized to shape and route these specific castellated edges, while V-cuts remain reserved exclusively for the non-castellated outer frames of the panel assembly.
Q: When is the ENIG surface finish mandatory for castellated designs at JLCPCB?
JLCPCB mandates the ENIG (Electroless Nickel Immersion Gold) surface finish process whenever oval castellated holes run parallel to the board edge and their extended slot length reaches or exceeds 5 mm. This standard ensures uniform plating thickness and optimal solderability across long half-hole cutouts, eliminating the copper burrs or oxidation defects that are common when using standard HASL or OSP finishes on complex edge geometries.
Q: How should I properly align the board outline and pads in my EDA software for castellated holes?
To ensure the factory's CAM system automatically and correctly interprets your intent, your board outline layer (such as the Mechanical or Keep-Out layer) must precisely bisect or pass directly through the center line of the plated-through holes (PTH). Furthermore, the associated top and bottom copper pads must be securely positioned inside the board outline, extending into the internal area of the board by at least 0.5 mm to guarantee strong physical anchoring to the substrate.
Conclusion
In conclusion, castellated holes are vital for modular, compact designs, but manufacturing success relies on strict DFM compliance. Aligning your layout with JLCPCB’s rigid PCB capabilities—specifically maintaining a minimum 0.6 mm hole size/spacing, using CNC milling instead of V-cuts on castellated edges, and choosing ENIG for extended slots—effectively eliminates engineering queries (EQs) and ensures a high-yield, reliable production run.
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