How to Set PCB Via Tenting in PCB Design Software
4 min
- Introduction
- Gerber Output and Via Tenting
- Why Via Tenting is Important
- Via Tenting in Altium Designer (AD)
- Via Tenting in Protel 99
- Conclusion
- FAQ
Introduction
Via tenting refers to covering the via pads and holes with solder mask ink (also known as solder resist), preventing solder from adhering to the pads. This is a process widely used in most circuit boards.
It's a critical part of PCB design, protecting the vias and enhancing the board’s durability and performance. In this guide, we'll show you how to configure PCB via tenting in commonly used software such as Altium Designer (AD) and Protel 99 to ensure your Gerber files meet the required manufacturing standards.
Inspection standard: Solder should not adhere to the via pads, whether through reflow soldering or manual soldering.
Gerber Output and Via Tenting
For PCBs ordered with Gerber output, although JLCPCB provides a “Via Covering” option on the ordering platform (with Tented as the most common/default choice), the Gerber file ultimately determines the final via properties. The “Via Tenting” or “Via Expose” options selected on the platform are secondary and not a substitute for correct Gerber configuration, so it’s crucial to configure your files correctly before submission.
Why Via Tenting is Important
According to JLCPCB’s manufacturing standards, tented vias are the default and most commonly used option. They prevent solder wicking into via holes during reflow or wave soldering. For reliable full coverage, via holes should ideally be 0.4 mm or less in diameter and no larger than 0.5 mm (if permitted by routing and current-carrying requirements). Larger vias are not guaranteed to be fully covered, and no complaints are accepted for such defects. By default, AD and Protel 99 export vias as exposed, so you’ll need to adjust the settings to apply tenting before generating Gerber files. Here’s how you can do it.
Via Tenting in Altium Designer (AD)
1. Open your PCB design in Altium Designer. Double-click on any via to open the properties. Check the boxes in front of "Force complete tenting on top" and "Force complete tenting on bottom".
- "Force complete tenting on top " means the vias will be covered on the top layer.
- "Force complete tenting on bottom " means the vias will be covered on the bottom layer.
2. Right-click the via you just edited and choose "Find Similar Objects" from the context menu.In the dialogue box, check both boxes next to "Solder Mask Tenting - Top/Bottom" and click OK to apply the changes.
By completing these steps, your Gerber file will contain tented vias when exported.
Via Tenting in Protel 99
1. Open your PCB design in Protel 99 and go to Design → Rules.In the rules menu, select "Solder Mask Expansion" and double-click to open the settings.
Configure Tenting Settings:
2.In the Solder Mask Expansion Rule menu, set the expansion mode to “Manual” and enter a negative expansion value (e.g., -0.1 mm or a value greater than or equal to the via radius) for vias. This forces the solder mask to fully cover the vias for complete tenting.
Click OK to save the settings, and proceed to export the Gerber file.
Following these steps will ensure that the vias are tented in your Protel 99 design, aligning with manufacturing requirements.
Conclusion
Mastering via tenting is key to producing high-quality, reliable PCBs. By setting up via tenting in Altium Designer or Protel 99, you can ensure your Gerber files are correctly configured for manufacturing. Properly tented vias will enhance the lifespan and performance of your PCB, protecting it from environmental factors.
For the best results, always review your via tenting settings before submitting your Gerber files to manufacturers like JLCPCB. It is also recommended to verify the final Gerber files using JLCPCB’s online Gerber viewer to confirm that all vias are properly tented.
FAQ
Q: Do I still need to set via tenting in the design software if I select “Via Covering” on the JLCPCB ordering platform?
Yes. The Gerber file ultimately determines the via properties; the platform option is secondary.
Q: What via diameter ensures reliable full tenting at JLCPCB?
≤0.4 mm is ideal for full coverage; up to 0.5 mm is allowed but not guaranteed.
Q: Can I apply tenting to only one side of the PCB?
Yes. In Altium Designer, check only “Force complete tenting on top” or “on bottom”.
Q: How do I verify tenting after exporting Gerber files?
Upload the Gerber files to JLCPCB’s online Gerber viewer and confirm solder mask fully covers the vias.
Keep Learning
The Ultimate Guide to PCB Panelization: Tools and Techniques
Printed circuit boards (PCBs) are the backbone of modern electronics. One critical aspect of PCB manufacturing is panelization — the process of arranging multiple PCBs onto a single larger panel for efficient manufacturing and assembly. This technique allows multiple boards to be processed simultaneously, significantly reducing costs and improving production efficiency. In this article, we will provide a comprehensive guide to PCB panelization, covering the tools and techniques required for successful......
Castellated PCBs: Introduction and Design Requirements
With the rapid development of electronic technology, electronic products are moving towards miniaturization, portability, multi-functionality, high integration, and high reliability.Consequently, printed circuit boards (PCBs) are frequently designed to integrate pre-existing, off-the-shelf modules. For example, IoT Bluetooth modules or NB-IoT modules, which are indispensable communication modules, can be soldered onto PCBs just like chips. These carrier boards are characterized by their small size and......
Copper Balancing in PCBs: Achieving Optimal Performance and High Yields with JLCPCB
Key Takeaways Copper balancing strategically distributes copper across PCB layers to create uniform density, preventing warpage, uneven plating, inconsistent etching, and signal integrity issues. The ideal copper density target sits within the 40%–60% golden ratio, with mirrored layers maintaining density variation within 15%–20% per IPC-6012 standards. Copper thieving (dot patterns or crosshatch meshes) equalizes current density during electroplating without introducing parasitic capacitance on spars......
PCB Design : How to Resolve Short Circuit Defects Caused by HASL
Key Takeaways In high-density PCB designs, HASL frequently causes solder bridging and short circuits due to its uneven surface and molten solder flow, especially on fine-pitch and dense traces. The most effective solution is to switch to ENIG (Electroless Nickel Immersion Gold), which provides superior planarity, significantly reduces bridging risks, and improves assembly yield. By selecting ENIG for dense layouts, optimizing solder mask design, and running DFM checks, designers can effectively elimin......
Design Process of a Surface Mount PCB
Key Takeaways Mastering the surface mount PCB design process is essential for creating compact, high-density, and reliable electronic boards. This comprehensive guide walks through the complete SMT workflow — from schematic capture and component selection to optimized layout, precise routing, DRC/ERC verification, and Gerber file generation — enabling designers to achieve superior performance, better manufacturability, and cost efficiency compared to traditional through-hole methods. By following thes......
Implications of border lines and 3D footprint lines on Mechanical Layer 1
Key Takeaways Mastering Mechanical Layer 1 is essential for accurate PCB manufacturing. Always place the complete board outline, mounting holes, and irregular slots on Mechanical Layer 1 (GM1), as JLCPCB prioritizes the lowest-numbered Mechanical Layer while ignoring KEEP-OUT and higher Mechanical Layers. 3D footprint lines serve only as design references and will not be fabricated. Following these layer priority rules and best practices ensures correct board dimensions, proper slot formation, and avo......