Technical Guidance: Five Via Finishes: Exposed, Tented, Plugged, Epoxy and Copper Paste Filled

Definition and Universal Inspection Standards

In response to customer requests, we have added the processes of "plugged vias," "epoxy-filled vias," and "copper paste filled vias," which can be selected in the ordering interface. Refer to the rules for via-in-pad filled vias (click here to view).

■ With exposed and tented vias, it is possible for solder beads to remain inside the hole because the hole is not completely sealed. Where this is not acceptable, filled vias should be used.

■ Vias exposed on either side of the board, via-in-pads, and vias within 0.35 mm of adjacent soldermask openings, cannot undergo ink-plugging inside the holes. Such via holes can be filled with epoxy or copper paste.

1. Exposed Vias

Definition: Refers to via holes not covered with soldermask, and the surface treatment is either ENIG or HASL (depending on the selected surface finish process when ordering).

Inspection Standard: Exposed via pads should be solderable both by reflow and by manual soldering.

Key Reminders:

❶ Vias differ from through-hole pads. Exposed vias are not for soldering components (via holes are not strictly controlled for specific sizes, while component pad holes are controlled at +0.13/–0.08 mm). If components require through-hole pads, they should be designed as component pad holes with exposed solder pad openings.

❷ Most PCBs have tented vias. If you indeed need exposed vias, in order to prevent solder connections during HASL causing short circuits, the distance from the exposed via hole solder pad edge to any adjacent solder pad should be greater than 0.2 mm (for values lower than this, consider gold plating).

2. Tented Vias

Definition: Refers to via holes where soldermask is applied, and there is no solder on the pads. This is the process used in most PCBs.

Inspection Standard: No solder should adhere to the exposed via hole solder pads after reflow soldering or hand soldering.

Key Reminders:

❶ Via holes should not be too large. Try not to exceed 0.4 mm and no larger than 0.5 mm at most for vias where allowed by wiring and current-capacity requirements. If via holes exceed 0.5 mm, there may be a risk of incomplete soldermask coverage during production, leading to the possibility of exposed via holes without ink on the hole walls. Complaints will not be accepted if poor tenting results from excessively large via holes.

❷ Causes of exposed via hole yellowing: soldermask ink is a viscous liquid. When it is applied to exposed vias, because the via pads are higher than the board surface, and the via hole interior is hollow, during baking in the oven at 300 degrees, the soldermask ink becomes more fluid, slowly flowing down the exposed via hole. This results in thinner ink on the solder pad, making it appear as if the exposed via hole solder pad is not ink-covered, leading to yellowing. Additionally, the ink on the exposed via hole is affected by surface tension and angle of the printing screen and stencil as well as the viscosity of the ink, making exposed via hole yellowing an inevitable outcome of the tenting process.

3. Plugged Vias

Definition: Refers to the process of plugging ink into exposed via holes. During production, soldermask ink is first plugged into the exposed via hole using aluminum sheets, and then the entire board is printed with soldermask. The plug rate can reach over 95%, completely solving the issue of exposed via yellowing.

Inspection Standard: The via pad yellowing rate should be below 5%. No solder adhesion is allowed, and the opacity of the plugged holes should be 95% or higher.

4. Epoxy Filled Vias

Definition: Refers to plugging non-conductive epoxy into via holes and then plating over the solder pads. This process is suitable for any type of via with soldermask openings on one side or via-in-pads with soldermask openings on both sides of the board.

Inspection Standard: Completely opaque. Normal soldermask on non-exposed vias and normal HASL or ENIG on exposed vias.

5. Copper Paste Filled Vias

Definition: Refers to plugging conductive copper epoxy into via holes and then plating over the solder pads. This process is suitable for any type of via with soldermask openings on one side or via-in-pads with soldermask openings on both sides of the board.

Inspection Standard: Completely opaque. Normal soldermask on non-exposed vias and normal HASL or ENIG on exposed vias. (The advantage of "copper paste filling" over regular "epoxy filling" is its high thermal conductivity with a thermal conductivity coefficient of 8 W/m·K.)

Key Reminders:

❶ Regardless of the type of plugged holes, via hole sizes should not exceed 0.5 mm. If via holes exceed 0.5 mm, there may be cases of incomplete plugging, leading to partial transparency or yellowing of the hole openings. Complaints will not be accepted.

❷ For those requiring epoxy/copper paste filling, please illustrate which via holes need plugging, or specify the range of hole sizes that should be epoxy/copper paste plugged when placing an order.

❸ For those requiring ink plugging, please provide PCB source design files as long as possible. We will tent and plug ink for all vias that meet process requirements. If you place an order with Gerber files instead and require ink plugging for vias, please provide drawings highlighting which vias need plugging. Additionally, specify the hole size for ink plugging in the "Personalized Services" - "PCB Order Notes" when placing the order.

We will remove soldermask openings for these exposed vias and change them to tented and plugged production (strongly recommended to check "Confirm Production Files").