PCB - JLCPCB Q&A

In Eagle, why do drill holes scale up 10x?

Why do the drill holes scale up using the Eagle CAM processor? I read the following advisory note: "Start from Eagle 7.2 t......

1 Reply Asked by 64*******0A

CADSTAR .spl

CADSTAR .spl files can be used as input ?

1 Reply Asked by 28*******5A

Vias for use under a big module such as ESP32

When using a bigger module like the ESP32 on a two layer board the ground cannot be easily connected directly because the ......

1 Reply Asked by 89*******1A

Is PCB for WLP or WLCSP package ICs can be fabricated at JLCPCB?

Hi, Is PCB for WLP/WLCSP package ICs, such as STM32F051T8Y6TR, can be fabricated? I know 0.28mm pad is acceptable but have......

1 Reply Asked by 55*******3A

Board cutout

Hello, which layer should be used for board cutouts? Thank you, Thomas

1 Reply Asked by 63*******3A

pre-design cercit

can you provide a pre disine dsp sine wave ips cercit

1 Reply Asked by 30*******6A

FPC design file

I want to make a single layer FPC with different direction contact. (Reverse direction FPC) If I use single copper layer a......

1 Reply Asked by 33*******0A

What alloy of aluminum do you use for your aluminum PCBs?

1 Reply Asked by 75*******5A

Sharing my PCB design so others can order?

Can I share my PCB design so that someone else can order it from their account?

2 Replies Asked by 83*******6A

order PCB, SMT stencil and parts

Can I order a PCB, SMT stencil and parts to solder it by myself? So not only parts (which is not possible) but in combinat......

1 Reply Asked by 88*******4A

Difference in via size in the designed and reviewed file, What is a printed circuit board made of?

My 8-layer PCB vias after review set to 0.2mm and the cost increased, while in my designed PCB file all vias is 0.3 mm. Do......

1 Reply Asked by 87*******1A

Excellon files

Seems that you cannot open excellon files. I put .XLN to my excellon files expecting to make them readable with no success

1 Reply Asked by 88*******7A

Minimum annular ring for via

What is the minimum annular ring for a via? I do not see any information about this in your capabilities page.

1 Reply Asked by 27*******9A

Minimum Hole Clearance - NPTH to PTH

For a keyboard PCB, I'm using "standard" keyswitch footprints in Kicad, but I'm concerned that holes may be too closely sp......

0 Reply Asked by 87*******9A

Solder mask question

Is it correct that the copper layer is not exposed in the area where the solder mask layer is removed from the attached pi......

1 Reply Asked by 75*******3A

Inquiry About PCB Fabrication Without Solder Mask

I am inquiring about the possibility of producing a PCB without any solder mask application. For our project, it is essent......

1 Reply Asked by 87*******6A

Exact Build Up of PTFE 1.52mm PCB

Hello, For simulation purpose I need to specify exact parameters of the PCB. In this case it's about 1.52mm 2 layer PTFE T......

1 Reply Asked by 56*******9A

PTH & NPTH hole distance from edge cut

What would be recommended minimum PTH and NPTH hole/drill distance from PCB edge (milled edge, not a v-cut) to avoid manuf......

1 Reply Asked by 21*******9A

MIlling slot size

hello, i see on the capabilities page to mill a slot inside the PCB area say a half circle the std mill size is 1mm ? can ......

1 Reply Asked by 22*******1A

single layer copper core trace spacing

Hello For singe layer copper core boards, what is the minimum trace width and the minimum distance between traces ? Thanks

1 Reply Asked by 86*******6A

PCB - JLC3DP Q&A