Via Covering: Tented, Untented, Plugged, Epoxy-Filled and Copper-epoxy-filled
When ordering a PCB there are generally five via covering options available: Tented, Untented, Plugged, Epoxy-filled & Capped, and Copper-epoxy-filled & Capped.
|Process||Same as all other exposed copper (HASL or ENIG).||Via covered with soldermask. Hole may or may not be filled.||Via filled with soldermask ink.|
|Ordering||Gerber files: Soldermask layer applies, selection ignored.||Gerber files: Soldermask layer applies, selection ignored.||Gerber files: Leave a note explaining which vias to plug.|
|Quality Standard||No soldermask on the via hole or annular ring. Solder should wet the annular ring.||Solder should not wet or adhere to the via.||The soldermask should cover the colour of copper in at least 95% of the vias. Solder should not wet or adhere to the via. Vias should have > 95% opacity.|
|Notes||Vias holes larger than 0.5 mm may have solder remaining within.||The soldermask over tented vias can be thinner than on the rest of the board and this can cause the colour of copper to show through.||Not available for vias without soldermask, via-in-pad, or vias closer than 0.35 mm from another soldermask opening. On multilayer boards, choose epoxy filling instead.|
|Finish Type||Plugged||Epoxy-Filled and Plated Over|
|Process||Via holes are filled with solder resist and are opaque||Via holes are filled with epoxy (conductive or non-conductive) and are opaque|
|Pros||Low-cost and simple to manufacture||Flat surface; no requirement on via placement|
|Cons||The filling can contain air bubbles, causing an uneven surface. Vias have to be soldermask-covered and no less than 0.35 mm from any other soldermask opening||Costly and complex to produce|
This option removes soldermask over all vias, exposing them to the same surface finish as all other exposed copper such as solder pads. Available surface finishes include HASL and ENIG.
Quality standard: vias should be wettable both in wave soldering and with a soldering iron.
Vias are treated differently from pads (through-holes where components are installed), and the via finish option does not apply to pads. Vias don’t have a specified tolerance whereas pad through-holes are +0.13/–0.08 mm. Vias should not be used to hold components; pads should be used instead.
To avoid shorts during HASL, bare vias should be spaced at least 0.2 mm away from other exposed copper. To achieve clearances lower than 0.2 mm, use ENIG instead of HASL.
This option is the most commonly used. Vias are covered with soldermask, and surface finish such as HASL is not applied to vias.
Quality standard: Solder should not adhere to vias, either in wave soldering or with a soldering iron.
Vias holes should ideally be 0.4 mm or less and no larger than 0.5 mm if permitted by routing and current-carrying requirements. Larger vias are not guaranteed to be fully covered; no complaints are accepted regarding this type of defect.
Why some tented vias appear yellow/brown: solder-resist is applied as a liquid and levelled by heating the board in an oven allowing the liquid to flow. During this process, the solder-resist can flow down the via hole, leaving a thinner layer on the annular ring than in other parts of the board. This allows the colour of the copper underneath to show through, making the vias look yellow/brown. This is a normal consequence of tenting vias.
Vias are filled with solder-resist before the whole board is printed with soldermask. This makes sure vias don’t appear yellow as they do when tented.
Quality standard: The soldermask should cover the colour of copper in at least 95% of the vias. Solder should not wet or adhere to the via. Vias should have > 95% opacity.
Epoxy-Filled & Capped Vias
Vias are filled with non-conductive epoxy resin, and then plated over with copper. Soldermask over the via is not required.
Quality standard: Vias should be completely opaque. Vias with soldermask can be printed over with silkscreen; those without soldermask should have the same surface finish (HASL / ENIG) as other exposed copper.
Copper-Epoxy-Filled & Capped Vias
Vias are filled with conductive epoxy resin containing copper, and then plated over with copper. Soldermask over the via is not required.
Quality standard: Vias should be completely opaque. Vias with soldermask can be printed over with silkscreen; those without soldermask should have the same surface finish (HASL / ENIG) as other exposed copper. This type of epoxy has an excellent thermal conductivity of 8 W/(m⋅K).
Plugged and epoxy-filled vias holes should not be larger than 0.5 mm as larger holes may be incompletely filled. No complaints are accepted for this problem.
For epoxy-filled vias, please leave a note or upload an image along with your design files to explain which vias should be filled. Alternatively, you can specify to fill all vias of a particular diameter.
For plugged vias, original CAD files are preferred over Gerber files as this lets us know which holes are vias and which are solderable through-holes. If you do upload Gerber files, please attach an image highlighting which vias should be plugged, and leave a note to specify which via diameters should be plugged. We recommend you select “Confirm production files” so that you can check the via finish is correct before the board goes to production.
Last updated on Nov 8, 2022
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